Capacitive circuits impose modest steady current but challenging transients. Energisation can produce high-frequency inrush, while interruption can leave trapped charge and a rapidly increasing voltage across the open breaker.

Learning objectives

Distinguish cable, line and capacitor-bank duties, assess inrush and restrike risk and apply the correct breaker class and mitigation.

Core engineering principles

Inrush is set by network impedance and initial voltage

Closing a discharged bank or cable can draw high-frequency current. Back-to-back capacitor switching can be especially severe because an energised bank discharges into the newly connected bank.

Interruption leaves trapped charge

After current zero, the isolated capacitance can retain voltage while source voltage reverses. The resulting recovery voltage challenges the opening gap.

Restrike can multiply stress

A restrike reconnects circuits at an unfavourable voltage difference and can produce transient current and overvoltage. Repeated restrikes increase insulation stress.

Capacitive classes are application evidence

Declared class must be read with test duty, voltage and current. It is not proof for every back-to-back bank arrangement.

Controlled switching can reduce transients

Point-on-wave closing or opening can reduce inrush or voltage stress, but requires accurate timing, voltage sensing and compensation for mechanism scatter.

Engineering application method

  1. Step 1: Classify the circuit as cable, line, single-bank or back-to-back bank.
  2. Step 2: Calculate steady current, inrush frequency and peak current.
  3. Step 3: Select breaker capacitive switching class and making capability.
  4. Step 4: Assess reactors, resistors or controlled switching where needed.
  5. Step 5: Verify protection and discharge arrangements for trapped charge.

Practical example

A breaker acceptable for a long unloaded cable may not withstand back-to-back capacitor inrush. Both are capacitive circuits, but the source impedance and stored energy create very different making duties.

Common mistakes

  • Selecting from steady capacitive current only.
  • Ignoring trapped charge and voltage reversal.
  • Assuming one C class covers every bank layout.
  • Omitting capacitor discharge verification.
  • Using controlled switching without timing maintenance.

Design and review checklist

  • What type of capacitive circuit is present?
  • What inrush and outrush are calculated?
  • Is restrike performance declared?
  • Is back-to-back duty involved?
  • Are discharge and controlled-switching functions monitored?

Standards basis and official sources

Engineering note: Verify the contracted standard edition, amendments, manufacturer evidence and project-specific studies before applying these principles to a supplied assembly.

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