Arc-Flash Detection in MV Switchgear: Combining Light Sensors and High-Speed Overcurrent Protection

Arc-flash protection in MV switchgear is fastest and most secure when optical detection identifies the compartment and a high-speed current criterion confirms an electrical fault. The design is not just “light AND overcurrent”: sensor coverage, trip zones, current source location, logic timing, breaker-failure escalation and the physical arc-resistant enclosure must work as one system.

This guide develops a practical light-plus-current scheme from hazard objective through sensor placement, logic, time budget, trip matrix, testing and maintenance. It also separates three concepts often confused in specifications: internal-arc-tested switchgear, an arc-flash hazard study and an active arc-detection system.

Executive rules

Do not treat optical protection as a substitute for IEC IAC/IEEE arc-resistant construction, installation or PPE/work rules.
Map each light sensor to a physical compartment and the minimum breakers needed to de-energise every source.
Choose the current-supervision location so it asserts for the minimum internal arcing fault in every topology.
Use light plus high-speed current for secure trip; define controlled exceptions where current cannot be measured reliably.
Calculate total clearing time through sensor, relay, output, trip circuit, breaker opening and arcing—not relay time alone.
Escalate through breaker-failure logic because a stuck incomer or coupler can keep the arc energised.
Test synchronized light/current and the full trip path in every zone, with the final settings and breaker.
Maintain sensor cleanliness, fibre continuity, self-supervision and configuration as safety-critical assets.

1. Three different layers of arc-flash risk control

Layer	What it establishes	What it does not establish
IEC 62271-200 IAC / IEEE C37.20.7-2024 testing	Switchgear performance under specified internal-arcing test conditions, classification/accessibility and installation constraints	Protection at every service fault/current/configuration or safe work outside the tested arrangement
IEEE 1584-2018 study	Predicted incident energy/boundary within its model scope using system and clearing data	Arc-resistant classification or relay-system dependability
Optical arc-detection scheme	Fast detection, selective tripping and event evidence for covered compartments	Containment, pressure relief, complete personnel protection or elimination of maintenance hazards

IEC 62271-200:2021+A1:2024 is the current IEC assembly standard for metal-enclosed switchgear above 1 kV through 52 kV and includes IAC concepts/tests. IEEE C37.20.7-2024 is the active IEEE recommended practice for testing switchgear up to 52 kV for internal arcing faults. Use the exact test classification, current/duration, accessibility sides, exhaust duct/room arrangement and installation instructions—not the label “arc resistant” alone.

2. Why optical detection is fast

An internal arc produces intense broadband light before conventional graded overcurrent may time out. An optical input can assert in milliseconds and bypass the intentional delays needed for feeder-to-incomer coordination. Current supervision rejects nonfault light from camera flashes, inspection lamps, welding or sunlight.

The protection goal is not “instantaneous relay operation”; it is minimum safe total arc duration compatible with security and breaker physics:

t_clear = t_{light/current acquisition} + t_logic + t_output/aux + t_{trip circuit} + t_{breaker opening} + t_{arcing interruption}.

Use maximum measured/tolerance values for the hazard/withstand assessment. A 2 ms optical algorithm cannot compensate for a 70 ms breaker, sluggish trip coil or failed DC supply.

3. Detection logic options

Logic	Benefit	Risk/appropriate use
Light only	Maximum sensitivity where current is unavailable or very low	Higher false-trip exposure; use only with engineered optical threshold, zone/context and operating policy
Current only, accelerated	Simple and independent of optical path	Cannot locate compartment; load/inrush/external fault security and CT saturation constrain pickup
Light AND current	Fast, secure standard approach	Blind if current input does not see minimum arc or one criterion arrives outside the coincidence window
Light AND (local OR upstream current)	Covers feeder/incomer/bus zones and varying current paths	More logic/channel/common-mode complexity
Two optical criteria	Optical redundancy without high current threshold	Common light source/sensor placement can defeat independence
Light alarm + current trip	Diagnostic for spurious/low light	Alarm path must not silently replace required trip

4. Point sensors, fibre loops and image-based devices

Point sensors: clear compartment identity and easy replacement; require line-of-sight/coverage study and more channels.
Bare-fibre/loop sensors: cover a long bus/cable path and can detect light along the route; a single loop may identify only a broad zone and requires bend-radius/continuity controls.
Dual-loop/dual-sensor: can improve availability, but prove physical and input independence.
Image/camera analytics: may support diagnostics, but protection timing/security and environmental qualification must be demonstrated separately.
External light probes: test/commissioning adapters must reproduce the sensor spectral/intensity requirement without opening energised compartments.

Optical threshold is product-specific. Arc light depends on enclosure geometry, arc location, barriers, reflective surfaces, smoke and sensor spectral response. A lux value from a handheld meter is not automatically equivalent to relay pickup.

5. Compartment coverage study

busbar and bus riser;
circuit-breaker/interrupter and shutters/stabs;
cable/termination compartment, including rear extension boxes;
VT/CPT/fuse/disconnector compartments;
bus coupler/riser and transition sections;
earthing switch and test-device arrangements where arcing is credible;
pressure-relief/exhaust path only if the sensor is qualified and zone logic remains meaningful.

For each compartment, document plausible arc positions, sensor field of view, opaque barriers in every service/isolated position, removable covers and whether smoke/debris can obscure a sensor. The safest layout uses a drawing with sensor ID, input channel, optical zone and trip outputs—not a generic note “one sensor per panel.”

6. Current supervision design

Calculate minimum arcing current for each relevant topology, fault location, source outage, grounding method and arc model.
Calculate maximum legitimate load, motor start, transformer inrush, capacitor switching and external through-fault current at each candidate CT.
Select phase and/or residual current supervision. A low-current earth arc in resistance/resonant grounding may need sensitive residual/different criteria.
Choose CT location: feeder CT can miss a bus arc supplied by another source; incomer CT can miss backfeed or islanded generation.
Verify CT/LPIT and relay high-speed input do not saturate/clip or delay assertion for asymmetric current.
Document pickup as a security/dependability window and test at boundary, frequency and DC-offset conditions.

The current element may be set lower than a conventional instantaneous trip because optical coincidence provides security, but it must still sit above maximum nonfault/transient current with tolerances. If the feasible window disappears, add measurement paths or a different confirmation criterion rather than forcing pickup.

7. Trip-zone matrix

Optical zone example	Primary trip	Escalation/notes
Outgoing feeder cable/CB compartment	That feeder breaker	If current persists, BF trips incomer/coupler/all sources
Main bus section A	Incomer A, coupler and all backfeeding sources connected to A	Block close/ATS/reclose; overlap at CT/breaker boundaries
Coupler compartment	Coupler plus both sources as zone study requires	Avoid leaving the arc fed from either section
Incomer cable/source side	Incomer breaker may not isolate upstream cable	Transfer trip upstream source or dedicated source-side isolation
VT/CPT compartment	All sources feeding that bus section	Coordinate fuse/disconnector and voltage-supervision behaviour

A trip matrix must use the actual CT and isolating-device zone boundaries. “Trip the nearest breaker” is unsafe when the arc lies on the line side or a coupler/DER backfeeds the compartment.

8. Logic timing and coincidence window

Light and current algorithms have pickup and dropout delays; determine worst relative arrival for arc inception angle and filters.
The coincidence/hold window must accommodate those delays but reject unrelated light and later load/inrush.
Latch the trip/zone target until controlled reset; capture first-out sequence.
Define sensor pickup with current absent (alarm/event), current pickup with light absent and both together.
Block auto-reclose/ATS/remote close after an internal-arc trip until inspection and authorised reset.
Do not let a communications scan/SCADA PLC perform primary millisecond logic unless its deterministic performance and failure mode are protection-qualified.
Hardwired and IEC 61850 GOOSE trip/blocking require maximum end-to-end time, supervision, redundancy and failure response.

9. Breaker-failure and remote isolation

Arc energy continues while any source supplies the fault. Start breaker-failure protection from the arc trip. Use current persistence and/or validated breaker-position criteria; trip adjacent incomers, coupler and remote upstream breakers according to the zone. Include motor/generator contribution and an incomer fault on the source side.

BF timer must exceed maximum successful clearing plus current-detector reset/logic/communication tolerance, yet remain inside switchgear/incident-energy objectives.
Trip-coil 2, retrip and upstream transfer trip can be staged when independence and time justify them.
A breaker 52a/52b contact alone may change before current interruption; current is generally essential for fault-clearing confirmation.
For low current or current-zero periods, use multi-criterion logic validated with the actual duty.
Ensure BF trip cannot initiate ATS/reclose onto the damaged bus.

10. Arc-energy and hazard-study integration

Run the short-circuit/arc-flash study for every normal/alternate source and maintenance mode.
Use actual arc scheme total-clearing time only for compartments/topologies where it is dependable and maintained.
Also calculate the scheme-out-of-service/backup-clearing case for risk assessment and labelling policy.
Check lower arcing-current case: lower current can make current supervision or an upstream element slower even when bolted current is high.
Update the study after breaker-time drift, settings, transformer/source, grounding or switchgear topology changes.
IEEE 1584-2018 has a defined model scope; for MV conditions outside it, use an approved engineering method and state limitations.

11. Reliability and self-supervision

monitor optical loop continuity/input health where supported;
supervise relay auxiliary DC, trip circuit, output contact and communication path;
alarm sensor contamination/damage discovered on inspection and remove unsupported “protection available” claims;
avoid one unprotected common DC fuse or Ethernet switch for all sensors and all trips;
define degraded mode: conventional protection remains active; operations are restricted if arc protection is unavailable;
record settings/firmware, sensor-to-zone map, relay logic and output matrix under change control;
provide a test mode that blocks actual trip only under formal isolation and clearly alarms the impairment.

12. FAT and commissioning test matrix

Inspect every sensor ID, field of view/fibre route, bend radius, connector and physical compartment against the zone drawing.
Inject light only at minimum/maximum positions; verify pickup, zone target and no trip where current supervision is required.
Inject current only below/above pickup; verify no optical trip and conventional elements remain correct.
Apply synchronised light and current at both coincidence-window boundaries and minimum operating levels.
Test each sensor against its exact trip matrix; prove adjacent zones do not overtrip unless intentionally required.
Measure sensor-to-relay, relay-to-coil and breaker total clearing with calibrated time references.
Prove BF retrip/escalation and remote transfer trip with persistent current.
Test current at all source paths, coupler states, DER/motor contribution and settings groups.
Fail sensor/loop, current input, VT if used, DC, output, network/time and breaker auxiliary contacts; verify alarm/fail-safe behaviour.
Verify arc trip latching, close/ATS/reclose block, SCADA first-out, SOE and oscillography.
Restore all test blocks/settings and perform an end-to-end final trip under controlled outage.
Archive measured light/current thresholds, timing, trip matrix, records and as-built sensor photographs.

SEL’s 4520 is one commercial example of a test module that provides synchronised light and current for optical arc-relay commissioning. Use the sensor/relay manufacturer’s spectral/intensity requirements and calibrated equipment; a phone flashlight proves neither threshold nor timing.

13. Maintenance

inspect point lenses/fibres after dust, smoke, maintenance or compartment work;
verify loop/input supervision and relay/DC/trip alarms continuously;
functional-test each sensor and current coincidence at the risk-based interval;
time the complete trip path and trend breaker opening/clearing, not relay assertion alone;
review events where light asserted without current—do not simply increase threshold;
repeat zone/trip-matrix tests after panel extension, coupler/source/DER changes or sensor relocation;
retain spares matched to sensor type, cable/connector and firmware.

14. Frequent mistakes

Mistake	Consequence	Correction
One sensor per panel without coverage study	Blind compartment	Arc-position/line-of-sight map
Only feeder CT supervises bus arc	No current assertion	All-source current logic
Trip nearest breaker	Source-side arc remains fed	Zone-boundary trip matrix
Relay operate time used as clearing time	Incident energy understated	Measured end-to-end maximum
No BF/ATS block	Arc persists or bus re-energises	Escalation and lockout
Camera flash-only test	Threshold/timing unproven	Qualified synchronized test
Arc relay replaces IAC/work controls	False safety claim	Layered design and exact classifications

References and further reading

Engineering note: Active arc detection reduces clearing time only for covered, correctly configured and maintained zones. Safety conclusions require the complete switchgear classification, room/exhaust installation, protection availability and work-practice assessment.