Shunt capacitor banks look electrically simple, but their protection
is not a scaled copy of ordinary feeder protection. A phase overcurrent
relay can clear a major terminal fault; it may not detect the loss of
one capacitor element until the remaining elements are already
overstressed. The decisive engineering work is therefore to match the
unbalance measurement, CT/VT arrangement, relay logic and switching duty
to the bank’s actual construction.
Engineering rule: start with the capacitor-bank
single-line and internal connection diagram. “Single wye”, “double wye”,
“grounded”, “ungrounded”, “internally fused”, “externally fused” and
“fuseless” are not interchangeable details; they determine what a failed
element does to the measurable current and voltage.
This guide develops a practical protection philosophy for
medium-voltage shunt capacitor banks, explains the principal unbalance
methods, provides a worked setting example and ends with an FAT/SAT test
schedule.
1. What the
protection system must accomplish
A complete scheme must address four different objectives:
- Clear high-current faults in the cable, breaker,
bus connection or bank. - Detect incipient internal failures before healthy
capacitor elements are exposed to damaging overvoltage. - Protect the bank from abnormal system conditions,
including excessive fundamental voltage, harmonic current, phase
unbalance and prolonged undervoltage where required by the operating
philosophy. - Control switching safely, including discharge time,
inrush, back-to-back outrush, breaker failure and re-energisation
interlocks.
The first objective is conventional. The other three require
information that a normal 50/51 feeder element alone does not
provide.
2. Bank data
required before relay selection
Do not begin with a relay catalogue. Obtain the following
primary-design data first:
- system voltage, maximum operating voltage and frequency range;
- bank MVAr, number of steps and kvar per step;
- single-wye, double-wye, H-bridge or other arrangement;
- grounded or ungrounded neutral;
- internally fused, externally fused or fuseless capacitor units;
- number of series groups and parallel units per group;
- unit capacitance tolerance and permitted natural unbalance;
- continuous, temporary and emergency voltage/current limits;
- neutral CT, phase CT, tap VT or neutral VT ratios and accuracy
data; - series reactor, detuning reactor and harmonic-filter data;
- circuit-breaker capacitor-switching class and back-to-back
duty; - discharge-device characteristic and minimum reclose interval;
- maximum bus fault current and available breaker-failure clearing
path.
The capacitor manufacturer should provide the predicted unbalance
signal for one failed element, one operated fuse and the maximum safe
number of failed elements. Those values are more useful than a generic
percentage copied from another bank.
3.
Rated current and the effect of voltage and frequency
For a three-phase bank rated at reactive power Q,
line-to-line voltage V and frequency
f, the approximate balanced line current is:
IC = Q / (√3 × V)
For a fixed capacitance:
I ∝ f × V
and:
Q ∝ f × V²
This matters because a capacitor bank can carry more than nameplate
current without a short circuit. Sustained overvoltage, frequency
deviation, capacitance tolerance and harmonic current all increase RMS
current. Phase overcurrent pickup must therefore be above the maximum
legitimate current but below the damaging overload and fault region. The
allowable margin must come from the capacitor-unit standard,
manufacturer data and harmonic study—not from a universal
multiplier.
4. Fault and
abnormal-condition map
| Condition | What changes electrically | Preferred detection | Typical action |
|---|---|---|---|
| Cable or bank-terminal phase fault | Large phase current | 50/51, possibly 87 | Fast trip and lockout |
| Ground fault on grounded bank | Neutral and/or phase current | 50N/51N, 50G/51G | Trip; lockout as required |
| One element or unit failure | Small internal unbalance; stress shifts to healthy units | Neutral current/voltage, tap-voltage differential or H-bridge unbalance |
Alarm then trip before damaging overvoltage |
| Sustained system overvoltage | Current and kvar rise; dielectric stress rises | 59 plus bank overload element | Alarm or delayed trip |
| Harmonic overload | RMS current and heating rise without equivalent fundamental voltage rise |
RMS/harmonic-capable overload, 49/51 as implemented | Alarm or trip |
| Phase loss or severe system unbalance | Negative-sequence voltage/current; uneven unit stress | 46, voltage/current unbalance | Alarm or trip |
| Breaker fails to interrupt | Bank remains energised after trip command | 50BF plus current/52a logic | Trip upstream/bus zone |
| VT circuit failure | False voltage, false unbalance or false 59N | Fuse-failure/LOP supervision | Block affected voltage functions and alarm |
| CT circuit failure | False or missing current unbalance | CT supervision, plausibility logic | Alarm; block only functions proved insecure |
ANSI numbers are useful shorthand, not universal function
definitions. Confirm the measured quantity and algorithm in the selected
relay manual.
5.
Why unbalance protection is the primary internal-fault detector
When a fuse isolates one failed capacitor element or a fuseless
element short-circuits, the bank may continue to draw nearly normal
three-phase current. Within the affected series string, however, voltage
redistributes across the remaining healthy elements. A small measured
unbalance can therefore indicate a large local dielectric stress.
Good unbalance protection must be:
- sensitive enough to detect the minimum failure that matters;
- secure for manufacturing tolerance and normal drift;
- stable for system voltage unbalance and external earth faults;
- correctly compensated for inherent bank unbalance;
- coordinated with individual unit fuses where fitted;
- staged so an early alarm can precede the maximum safe trip
threshold; - verified by calculation and by commissioning injection.
Natural-unbalance
compensation
Real banks are never perfectly symmetrical. Unit capacitance
tolerance, conductor geometry, CT error and VT error create a standing
signal. Modern relays may subtract a learned or entered
magnitude-and-angle compensation vector. Compensation must be
established with the complete bank healthy and under representative
voltage. It must not be used to hide a wiring error, an already failed
element or a signal that drifts with load.
Record both the uncompensated and compensated values in the
commissioning report. A later change in the uncompensated value is
valuable condition information even if the operate quantity remains
below pickup.
6. Main unbalance
measurement methods
6.1 Neutral
current of a grounded single-wye bank
A CT in the bank neutral measures current returning to ground. The
arrangement is simple and sensitive, but the signal can contain system
zero-sequence current as well as bank internal unbalance. The protection
study must check security for external earth faults, CT saturation and
neutral harmonics.
Suitable elements may be labelled 50N/51N, 50G/51G, 60N or capacitor
unbalance, depending on the manufacturer.
6.2
Neutral displacement voltage of an ungrounded single-wye bank
A VT between the floating bank neutral and ground measures
displacement caused by unequal phase capacitance. It avoids a direct
neutral-earth current path, but requires careful VT insulation, ratio
selection, secondary protection and fuse-failure supervision. System
voltage unbalance can appear in the same measurement, so compensation or
a calculated correction may be necessary.
6.3
Current between the neutrals of a double-wye bank
The two nominally identical wye sections are compared with a CT in
the connection between their neutrals. Balanced system disturbances tend
to affect both halves similarly, while a unit failure in one half
creates differential neutral current. This is a powerful and widely used
method, provided the two halves have comparable construction and the CT
polarity is correct.
6.4 Tap-voltage differential
Voltage from a tap within each phase or from a dedicated VT is
compared with bus voltage or with an equivalent reference. This method
can provide excellent sensitivity for internally fused or fuseless
banks. Ratio and phase-angle errors, VT fuse failure and the exact
number of series groups must be included in the calculation.
6.5 H-bridge current
unbalance
Each phase is divided into bridge arms, and a CT measures the current
between the bridge midpoints. A failed element changes the arm
impedances and produces bridge current. The method can identify small
changes while rejecting common-mode system conditions, but the physical
symmetry, CT installation and bank-specific balance calculation are
essential.
| Bank arrangement | Common unbalance quantity | Main strength | Main engineering risk |
|---|---|---|---|
| Grounded single wye | Neutral current | Simple, sensitive measurement | External zero-sequence current and harmonics |
| Ungrounded single wye | Neutral-to-ground voltage | No grounded bank neutral required | VT scaling, system unbalance and fuse failure |
| Double wye | Current between neutrals | Common-mode rejection | Mismatch between the two bank halves |
| Tapped bank | Voltage differential | High sensitivity | VT/tap ratio and phase-angle error |
| H-bridge | Bridge current | Sensitive internal comparison | Physical asymmetry and CT polarity |
7. Protection-function
philosophy
Phase overcurrent: 50/51
Use a high-set stage for severe cable or terminal faults and a
delayed stage for sustained overcurrent. Check energisation inrush and
back-to-back switching current so the instantaneous stage does not trip
on a healthy close. If the relay offers harmonic or transient restraint,
apply it only with documented behaviour and testing.
Earth-fault protection:
50N/51N or 50G/51G
The correct source may be residual current calculated from phase CTs,
a core-balance CT, or a neutral CT. These sources are not equivalent at
low pickup. A core-balance or neutral CT normally provides better
sensitive-earth-fault performance than the residual of three high-ratio
phase CTs.
Overvoltage and undervoltage:
59/27
Overvoltage protection guards the capacitor dielectric and may also
prevent unacceptable bus-voltage rise. Undervoltage is commonly part of
automatic bank control or loss-of-bus logic. If it trips the bank,
coordinate it with motor-starting dips, fault-clearing time, transfer
schemes and automatic reclosing.
Unbalance
and negative sequence: 60, 46 and vendor-specific bank functions
Use the bank-specific unbalance element as the main detector of
unit/element failures. Negative-sequence current or voltage can provide
backup for a phase-loss or severe asymmetry condition, but it is not a
substitute for a calculated capacitor-unit protection stage.
Thermal/overload
protection: 49 or equivalent
The element must represent the actual heating quantity. For filter
banks, RMS and harmonic content can be decisive. Verify whether the
relay calculates fundamental current, true RMS current, a thermal image
or a frequency-dependent quantity.
Breaker failure and lockout:
50BF/86
Initiate breaker failure from every protection stage that trips the
bank breaker. Use breaker current and/or auxiliary contacts according to
the project philosophy, then trip the upstream source or relevant bus
zone if current persists after the expected interrupting time plus
margin. Internal bank faults commonly justify lockout and inspection
before re-energisation.
8. Worked
example: 11 kV, 4.8 MVAr double-wye bank
Assume the following illustrative data:
- bank rating: 4.8 MVAr at 11 kV, 50 Hz;
- one switched step;
- double-wye grounded arrangement;
- phase CTs: 400/1 A;
- dedicated inter-neutral unbalance CT: 10/1 A;
- calculated maximum healthy bank current, including voltage,
frequency, tolerance and harmonic study allowances: 290 A; - measured healthy uncompensated inter-neutral current during
commissioning: 0.18 A primary; - capacitor manufacturer states that the alarm must operate no later
than 0.8 A primary and the trip must operate no later than 1.5 A primary
for the supplied element layout.
Rated current is:
IC = 4,800,000 / (√3 × 11,000) = 252
A
Illustrative
phase-overcurrent pickup
On the 400/1 A CT, 290 A primary equals:
290 / 400 = 0.725 A secondary
An illustrative delayed pickup of 0.80 A secondary (320 A
primary) leaves margin above the studied healthy maximum. Its
curve and delay must still coordinate with the capacitor withstand data,
upstream relay, breaker duty and harmonic behaviour. The instantaneous
stage requires a switching-transient study; it must not be chosen merely
as a multiple of rated current.
Illustrative unbalance
stages
On the 10/1 A CT:
- 0.8 A primary = 0.08 A secondary;
- 1.5 A primary = 0.15 A secondary.
A defensible starting philosophy is:
- Alarm: pickup at or below 0.08 A secondary with a
delay that rejects switching transients; - Trip: pickup at or below 0.15 A secondary with a
shorter definite delay; - compensate the healthy 0.018 A secondary vector only after wiring
and bank condition are verified; - confirm that relay input resolution and CT performance are adequate
at these small currents.
These figures are not generic settings. They are valid only because
the example includes a bank-specific failed-element calculation.
9. Suggested trip and alarm
matrix
| Function | Alarm | Trip bank CB | Lockout 86 | Start 50BF | Block reclose |
|---|---|---|---|---|---|
| Unbalance stage 1 | Yes | No | No | No | No |
| Unbalance stage 2 | Yes | Yes | Usually | Yes | Yes |
| 50 high-set phase/earth fault | Yes | Yes | Yes | Yes | Yes |
| 51 time overcurrent | Yes | Yes | Project-specific | Yes | Project-specific |
| Severe overvoltage/overload | Yes | Yes | Project-specific | Yes | Until condition clears |
| VT fuse failure/LOP | Yes | No | No | No | Inhibit voltage-dependent automatic close |
| CT/unbalance-circuit failure | Yes | No, unless required | No | No | Consider manual-only operation |
| Breaker failure | Yes | Upstream trip | Yes | N/A | Yes |
The matrix must be reviewed against plant availability. An alarm-only
first unbalance stage is useful only if operators have a defined
response time and the second stage protects the bank without relying on
intervention.
10. Switching and
re-energisation interlocks
Protection cannot correct an unsuitable switching design. Check:
- circuit-breaker capacitive switching duty and restrike
performance; - single-bank and back-to-back inrush/out-rush current;
- series reactor or pre-insertion device where required;
- point-on-wave controller assumptions, if used;
- breaker pole scatter and phase discrepancy;
- trapped charge and the discharge-device curve;
- minimum dead time before a close command is accepted;
- bus-voltage permissive and abnormal-frequency logic;
- prevention of repeated close attempts after a protection trip;
- breaker failure initiation from bank protection and manual emergency
trip.
The reclose timer must follow the capacitor manufacturer’s verified
residual-voltage requirement. A commonly encountered waiting time must
never be copied into a new project without checking the supplied
discharge system.
11. FAT and SAT test schedule
Wiring and measurement
checks
- prove phase CT, neutral CT and VT ratios, polarity and single-point
secondary earthing; - verify that test-switch operation shorts CT circuits before
isolation; - confirm the relay sees the correct phase sequence and balanced
phasors; - record natural unbalance before applying compensation;
- verify all MCB/fuse auxiliary contacts and CT/VT supervision
signals.
Functional injections
- inject balanced rated current and prove no unbalance operation;
- inject each unbalance stage in magnitude and, where applicable,
angle; - test one phase at a time to prove phase identification;
- test phase 50/51, earth-fault, 46, 27, 59 and overload stages;
- simulate a VT fuse failure and prove selective blocking rather than
an unwanted bank trip; - simulate a communication or remote-I/O failure if the trip path is
digital; - verify breaker-failure pickup, timer, retrip and upstream trip
outputs.
End-to-end and primary
checks
- where practicable, produce a controlled primary unbalance or use the
manufacturer’s approved commissioning method; - prove the complete trip path to the correct breaker and lockout
relay; - confirm SCADA alarms, SOE timestamps and disturbance-record
triggers; - verify close permissives, discharge timer and lockout reset;
- document operate values, times, compensated vectors and as-left
settings.
12. Common design mistakes
- Selecting the relay before the bank internal connection is
frozen. - Treating phase overcurrent as complete internal protection.
- Copying an unbalance percentage from a different bank.
- Compensating a large standing signal without finding its cause.
- Ignoring relay input resolution at very low neutral current.
- Deriving sensitive residual current from three high-ratio phase CTs
without an error study. - Blocking every voltage function on LOP without a
function-by-function security review. - Omitting back-to-back switching current from the instantaneous-stage
check. - Allowing automatic reclose before verified discharge.
- Failing to initiate breaker failure from an internal bank trip.
13. Specification checklist
A project specification should state, at minimum:
- bank topology and fuse philosophy;
- protected zone and CT/VT locations;
- required unbalance measuring principle and two-stage operation;
- natural-unbalance compensation and recording requirements;
- phase, earth-fault, voltage, overload, negative-sequence and
breaker-failure functions; - relay input range and resolution for the minimum operate
quantity; - trip, alarm, lockout and reclose-block matrix;
- transient security and capacitor-switching duty;
- IEC 61850/SCADA points, disturbance records and time
synchronisation; - FAT, primary-injection/SAT and as-left documentation
requirements.
Conclusion
The best capacitor-bank protection is built from the capacitor-unit
arrangement outward. Phase and earth-fault elements clear severe faults,
but sensitive, bank-specific unbalance protection limits the cascading
voltage stress that causes extensive damage. Correct CT/VT selection,
natural-unbalance compensation, switching interlocks, breaker-failure
logic and end-to-end testing are all part of the protection—not optional
accessories.
Authoritative
references and further reading
- IEC 60871-1:2014, Shunt
capacitors for a.c. power systems above 1,000 V - IEEE C37.99, Guide for the
Protection of Shunt Capacitor Banks - SEL: Principles of
Shunt Capacitor Bank Application and Protection - SEL-487V
capacitor-bank protection documentation - SEL: Capacitor Bank
Protection for Simple and Complex Configurations - ABB REV615 capacitor-bank
protection and control application manual
Application note: Standard editions, relay firmware
and manufacturer terminology change. Verify the contracted editions and
the exact relay manual before approving settings or test sheets.