VT Fuse-Failure and Loss-of-Potential Supervision: Logic, Blocking and Testing

A voltage transformer circuit can fail without any primary-system
fault. A blown fuse, tripped miniature circuit-breaker, open test
switch, loose terminal or broken wire can reduce one or more relay
voltage inputs while the power system remains healthy. Unless the relay
recognises this loss of potential (LOP), voltage-dependent protection
may trip incorrectly or become unavailable without warning.

Protection principle: fuse-failure supervision does
not prove the primary system voltage. It decides whether the relay’s
voltage measurement is trustworthy enough for each dependent
function.

This guide explains LOP signatures, sequence-component logic,
function blocking, settings, worked phasor examples and a practical
FAT/SAT test plan.

1. What counts as loss of
potential?

LOP, fuse failure or VT circuit supervision can refer to:

  • one blown secondary fuse;
  • a tripped VT secondary MCB;
  • one or two open phase wires;
  • an open neutral in a star-connected secondary circuit;
  • an open test switch or withdrawn test block;
  • a loose terminal or high-resistance connection;
  • failure of a VT primary fuse;
  • loss of an entire VT secondary supply;
  • wiring polarity or phase-selection errors introduced during
    maintenance;
  • failure of a merging unit, sampled-value stream or analogue input
    path in a digital substation.

These conditions do not all produce the same phasors. A useful
supervision scheme combines electrical logic with hardwired or digital
status rather than relying on one undervoltage threshold.

2. Why LOP can cause a false
trip

Many relay elements interpret voltage as evidence about the primary
system. If a measured phase voltage collapses because of a secondary
fault, the element may see a condition that resembles a real
disturbance.

Protection/control function Possible effect of bad voltage Preferred LOP response
27 undervoltage False pickup or trip Block or supervise affected stage
59 overvoltage One phase may be low; neutral shift may make calculated quantities
misleading
Supervise voltage source; retain only demonstrably secure logic
59N/64 residual voltage False residual voltage from one missing phase Block if derived from affected phase VTs
21 distance Apparent impedance collapses or shifts Block affected zones or use relay-specific secure fallback
67/67N directional overcurrent Direction/polarisation becomes wrong Block directional decision or apply approved memory/alternative
polarisation
32 power / 40 loss of excitation Calculated power or impedance becomes false Block affected element and alarm
24 volts per hertz Calculated V/Hz becomes unreliable Block or transfer to a valid independent source
25 synchronism check Unsafe comparison or inability to close Block closing; never bypass automatically
Voltage-restraint/controlled 51V Pickup may become too sensitive Block or revert only to a designed backup characteristic
Metering, power factor and demand Wrong indications and control decisions Mark quality bad/alarm

Pure current elements such as phase 50/51 and properly applied
current differential protection do not need to be blocked merely because
a VT circuit has failed. Blocking the whole relay sacrifices dependable
fault clearing.

3.
Distinguishing LOP from a real power-system event

No single test covers every network. The relay normally looks for
inconsistency between voltage, current, breaker status and sequence
quantities.

Negative-sequence
voltage without negative-sequence current

Loss of one phase voltage produces substantial V₂ at
the relay. A real unbalanced primary fault usually also produces
I₂. Therefore a common indication is:

  • negative-sequence voltage above a threshold; and
  • negative-sequence current below a security threshold.

This method needs care on lightly loaded circuits, behind converter
interfaces, during open-phase conditions and where a high-resistance
primary fault produces little current.

Residual voltage
without residual current

One missing phase in a three-phase VT set produces calculated
residual voltage 3V₀, but no corresponding primary
residual current. Comparing V₀ with I₀
can distinguish a secondary voltage-circuit failure from a primary
ground fault.

The method depends on CT residual-current sensitivity and on whether
3V₀ is calculated from the three phase inputs or
measured independently from an open-delta winding.

Abrupt
voltage change without matching current change

A relay can compare the change in phase voltage with the change in
phase current. A step reduction in measured voltage with essentially
unchanged load current strongly suggests an instrument-circuit problem.
The timer must tolerate real switching, motor starting, transformer
energisation and faults cleared elsewhere.

Three-phase loss logic

Complete loss of all three voltages can mean:

  • VT MCB open or secondary supply lost;
  • primary bus de-energised;
  • breaker open and line dead;
  • three-phase primary voltage collapse.

Current above a small threshold while all voltages are low is strong
LOP evidence. When both current and voltage are near zero, breaker,
disconnector, MCB auxiliary contact and redundant-voltage-source status
become important.

MCB/fuse status and
redundant sources

An auxiliary contact from a three-pole VT MCB gives fast,
deterministic supervision, but it cannot detect a broken conductor
downstream and may not reveal one failed primary fuse. Electrical logic
should remain enabled.

Where two independent VT sources or merging units exist,
cross-checking them can identify a failed channel. The comparison needs
ratio, phase-shift, bus-selector and synchronism logic so it does not
declare failure while the sources legitimately measure different
buses.

4.
Symmetrical-component signature of one missing phase

Assume balanced relay voltages of 1.0 pu and then the phase-A
secondary circuit opens, while phases B and C remain correct:

  • VA = 0;
  • VB = 1∠−120° pu;
  • VC = 1∠+120° pu.

Using symmetrical components, the relay calculates approximately:

  • positive-sequence voltage V₁ = 0.667 pu;
  • negative-sequence voltage magnitude |V₂| = 0.333
    pu
    ;
  • zero-sequence voltage magnitude |V₀| = 0.333
    pu
    .

Thus one open voltage lead can simultaneously resemble undervoltage,
negative-sequence voltage and neutral displacement. If current remains
balanced, the high V₂/low I₂ and high V₀/low
I₀
combinations provide strong LOP evidence.

This ideal example is useful for test expectations. Actual results
include VT errors, load unbalance, harmonics, residual compensation and
the relay’s phasor filtering.

5. Measurement arrangements
matter

Three phase-to-neutral
inputs

The relay can calculate positive-, negative- and zero-sequence
voltage. A missing phase creates a clear sequence signature, but an open
secondary neutral can disturb all phase measurements in a load-dependent
way.

Two phase-to-phase inputs

With a V-V connection, the relay derives the third line voltage. The
available sequence quantities and fuse-failure algorithm differ from a
four-wire star circuit. Configure the exact connection; do not accept a
default VT mode.

Open-delta residual voltage

An open-delta secondary measures residual voltage independently of
the phase metering windings. If 59N/64 uses this winding, loss of one
phase metering fuse need not invalidate it. Conversely, a failed
open-delta circuit can disable earth-fault detection while phase
voltages appear healthy. Supervise the channels separately.

Bus/line VT selection

Bus-section and transfer schemes often select among several VT
sources. The selector contacts, disconnector status and relay logic
become part of the voltage circuit. Apply break-before-make switching
where required and alarm an impossible or no-source state.

Digital sampled values

With IEC 61850-9-2 or IEC 61869-9 sampled values, “fuse failure” can
become lost packets, invalid quality, time-synchronisation failure,
stream mismatch or merging-unit failure. Use data-quality attributes and
communications supervision in addition to phasor plausibility.

6. Blocking and fallback
philosophy

The safest response is function-selective:

  1. Declare the affected voltage source unhealthy.
    Latch or seal the alarm long enough for operators and records to capture
    it.
  2. Block functions that would be insecure. Examples
    include 27, 21, 32, 40, 59N calculated from the failed phases and
    voltage-polarised 67.
  3. Keep independent protection available. Phase/earth
    overcurrent, differential and other healthy-source functions should
    continue.
  4. Prevent unsafe closing. Loss of either side’s
    voltage used by synchronism check should block the close
    permissive.
  5. Use a fallback only if engineered. Memory voltage,
    cross-polarisation, non-directional backup or a second VT source must be
    validated for the application.
  6. Restore deliberately. Apply a stable healthy timer
    and consider manual reset where an intermittent circuit could
    chatter.

Temporary memory polarisation can support directional elements
through a close-in fault, but it is not an indefinite substitute for a
missing VT input. Its duration and decay are relay-specific.

7. Pickup and timer setting
approach

The relay manual normally defines thresholds such as minimum phase
voltage, V₂, I₂, V₀,
I₀, current-present level and change detectors. A
defensible process is:

  1. determine minimum normal and abnormal system voltage;
  2. calculate genuine unbalance during normal load, motor start,
    transformer energisation and credible open-phase operation;
  3. calculate V₂/I₂ and V₀/I₀ for
    minimum primary faults;
  4. simulate one-, two- and three-phase VT circuit failures;
  5. place voltage thresholds above measurement noise and normal
    unbalance but below the expected failed-circuit signature;
  6. set current thresholds so a real fault is not labelled LOP;
  7. coordinate the operate delay with the fastest voltage-dependent
    element that must be blocked;
  8. set recovery delay to prevent repeated blocking during loose-contact
    intermittency;
  9. verify every switching state and voltage-source selection.

An LOP timer must operate before the affected protection can make an
incorrect trip. It must also ride through relay filtering, normal
switching transients and the legitimate voltage changes identified in
the study. These competing constraints should be tested dynamically.

8. Illustrative logic example

For a feeder with three phase voltages and currents, an
illustrative—not universal—one-phase fuse-failure assertion might
require:

  • |V₂| > 0.15 pu;
  • |I₂| < 0.05 pu;
  • at least one phase current > 0.10 pu;
  • condition sustained for 80 ms.

A separate three-phase LOP path might assert when:

  • all three phase voltages are < 0.15 pu;
  • current is > 0.10 pu, or the breaker and
    isolator indicate an energised circuit;
  • the VT MCB auxiliary contact is open, or the condition persists for
    a validated timer.

The one-phase-loss example above creates |V₂| ≈ 0.333
pu
, so it would satisfy the voltage criterion if current
remains balanced. However, real feeder unbalance, CT errors and
minimum-fault current must be plotted before adopting any numbers.

9. Example supervision matrix

LOP condition Block Keep enabled Control action Alarm
One phase metering VT lost 27/21/32/40 and affected directional/derived residual functions 50/51, differential, independent open-delta 59N if healthy Block synch-check close using that source Latched high priority
All phase VTs lost, load current present All functions dependent on that voltage source Current-only protection Block voltage-dependent close/transfer logic Latched high priority
VT MCB open while circuit de-energised Arm block before energisation Healthy independent protection Block energisation if required Maintenance alarm
Open-delta channel failed only 59N/64 using that channel Phase-voltage functions if independently healthy Site-specific High priority
Sampled-value stream invalid All functions subscribed to invalid stream Functions using independent stream/local current Block associated controls High priority plus data-quality event
LOP cleared and voltage stable Release after recovery timer/manual check All Restore close logic only after valid source confirmed Clear with event record

Create this matrix at the level of each relay function and each
voltage source. A single global “VT fail block” bit is rarely sufficient
for a complex panel.

10. FAT test programme

A robust factory test includes:

  • normal balanced voltage and current at minimum and maximum operating
    levels;
  • loss of phase A, B and C separately;
  • loss of each pair of phases;
  • simultaneous loss of all phase voltages with load current
    present;
  • dead bus with breaker open and both voltage and current absent;
  • simulated primary phase-to-ground fault with corresponding
    V₂/I₂ and V₀/I₀;
  • load unbalance and open-phase primary-system conditions;
  • VT MCB auxiliary contact operation and contact discrepancy;
  • open-delta residual-voltage circuit failure;
  • changeover between bus and line VT sources;
  • LOP operate and recovery timers at boundaries;
  • proof of every intended function block and every function that must
    remain active;
  • close-circuit and synchronism-check blocking;
  • SCADA alarm, SOE time stamp and disturbance record;
  • invalid sampled-value quality, stream loss and restoration where
    applicable.

An official ABB relay test procedure, for example, demonstrates
fuse-failure pickup by starting with balanced phase voltages and
reducing one phase from 100 V to 60 V while checking the fuse-failure
indication. That is a device-specific test point, not a universal pickup
setting.

11. Site acceptance testing

At site, prove the actual wiring from VT secondary terminals to every
relay, meter and selector:

  1. inspect primary and secondary fuses/MCBs and their ratings;
  2. confirm one secondary neutral-earth connection at the designated
    point;
  3. verify phase identification, ratio, polarity and phase
    rotation;
  4. test each fuse/MCB auxiliary contact at the relay and SCADA;
  5. operate each test switch and VT selector through all valid
    states;
  6. apply three-phase secondary voltage and current, then remove each
    voltage lead using safe test facilities;
  7. verify block bits inside the logic and the resulting output
    contacts/GOOSE messages;
  8. confirm current-only backup still trips while LOP is active;
  9. prove synchronism-check refuses a close when either required voltage
    source is invalid;
  10. restore all links and compare live phase/sequence values with an
    independent instrument;
  11. save event records and the approved as-left settings file.

Do not pull a live VT secondary fuse as an improvised test. Use
approved isolation and injection facilities, because VT circuits can
backfeed through connected devices and an open neutral can expose
unexpected voltage.

12. Common mistakes

  • Blocking the entire relay instead of only voltage-dependent
    functions.
  • Using undervoltage alone, which cannot distinguish a dead bus from
    LOP.
  • Assuming an MCB auxiliary contact detects every downstream broken
    wire.
  • Applying high-V₂/low-I₂ logic
    without checking weak infeed and converter-limited faults.
  • Calculating 59N from failed phase inputs while assuming the
    independent open-delta winding is supervised.
  • Letting LOP bypass synchronism check and issue a close
    permissive.
  • Forgetting VT selector and disconnector auxiliary-contact
    disagreement.
  • Testing pickup but not proving the actual protection-function
    blocking matrix.
  • Restoring functions immediately when an intermittent terminal
    briefly remakes.
  • Ignoring sampled-value quality and time status in a digital
    scheme.

13. Design checklist

Before issue for construction, document:

  • every VT winding, fuse/MCB, test switch, selector and secondary
    earth;
  • which functions use each physical or sampled-value source;
  • one-, two- and three-phase LOP detection logic;
  • thresholds, timers, recovery and latch behaviour;
  • real-fault security cases and dead-system discrimination;
  • function-by-function block, fallback and alarm matrix;
  • synchronism-check and control interlocks;
  • IEC 61850 quality, GOOSE and sampled-value failure handling;
  • FAT, SAT and periodic proof-test procedures.

Conclusion

VT fuse-failure supervision is a plausibility system. It compares
voltage with current, sequence quantities, switch status and data
quality to decide whether a voltage input represents the primary
network. The best schemes block only the functions made unsafe, preserve
independent current protection and prevent closing until a valid voltage
source is restored. Testing must prove those consequences, not merely
one LOP indication LED.

Authoritative
references and further reading

Application note: Element names, sequence
thresholds, memory-polarisation behaviour and block matrices vary by
relay and firmware. Validate the exact implementation against the
approved protection study, scheme drawings and manufacturer manual.

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